1. Field
The following description is related to a reconfigurable processor and a compiler for the reconfigurable processor.
2. Description of the Related Art
Generally, reconfigurable architecture refers to an architecture in which the hardware configuration of a computing device may be changed to optimally perform a task.
When a task is processed only in a hardware manner, it is difficult to efficiently carry out the task if changes occur in the process of the task. This difficulty is caused because of the fixed configuration of the hardware. In contrast, if a task is processed only in a software manner, the task can be processed by reconfiguring the software if changes occur in the process of a task, however, the processing speed is slower than when the data is processed in a hardware manner.
Reconfigurable architecture combines the advantages of both hardware and software to process a task. Such reconfigurable architecture has drawn more attention from the digital signal processing field in which an operation is repeatedly processed.
One type of reconfigurable architecture is a coarse-grained array (CGA). A coarse-grained array typically consists of a number of processing units, and the connection between the processing units is adjusted to more optimally process a specific task.
Recently, a reconfigurable architecture has been introduced which utilizes a specific processing unit of a coarse-grained array as a very long instruction word (VLIW) machine. This reconfigurable architecture has two execution modes, including CGA mode and VLIW mode. In the CGA mode, typically an iterative loop operation is processed, and in VLIW mode, typically general operations other than a loop operation are processed.